Conception et simulation d’un amplificateur audio haute performance et basse consommation pour smartphone

Abstract

In recent years, class-D amplifier has received a lot of attention because, basically, of the need of high efficiency and low dissipation. Since it offers these competitive and exceeded advantages, it becomes the desired and has generated a great deal of interest. Traditional amplifiers have simple architecture but very low efficiency, which makes them a poor option. The class D amplifier came to replace them and take them out of the market, because of its high efficiency especially, after big development in MOSFET transistors. This thesis is devoted to design and simulate an efficient architecture of class-D amplifier using OrCad/PSpice. Class-D amplifier has annoying drawbacks: the architecture complexity, adding to the non-linearity. These are the main dilemmas comparing to classes-A, B and AB. We propose a simple efficient architecture with a novel RC network which mimics classic amplifiers in terms of simplicity, but overcomes them in terms of efficiency, it decreases THD+N (decreases non-linearity) to a very low level, by 3 times more less than other architectures in state of the art. In addition, our architecture has obtained good results in terms of SNR and PSRR.